How to make chip integration technology suitable for high volume production

Abstract

Purpose

This paper aims to present an overview of existing component embedding methods and to show the differences of the new embedding method called SEAG iBoard.

Design/methodology/approach

In most existing embedding technologies bare dies are embedded and contacted to the PCB by through hole plating technologies of the PCB industry. The new method uses a preassembled interposer for embedding which leads to rewiring of the chip contacts to larger pads on the interposer. In a next step passive components will be added to the active die on the same interposer.

Findings

The use of an interposer for embedding leads to a better compatibility of chip processes and PCB processing. Unlike other approaches, the PCB processes can be kept more or less the same as for standard production. Therefore, this new method is suitable for volume applications. The method also shows competitive advantages. Up to now the reliability tests showed a very high reliability of interconnects between the Si‐chip and PCB. Up to 5,000 TCT between −40° and 140°C could be demonstrated. These tests have been performed with daisy chain test chips.

Research limitations/implications

The qualification results have to be confirmed with functional chips. The principle of this technology is to receive larger interconnection pads by the use of an interposer. Therefore, this technology might have limitations, where lengths of signal paths play the dominant role.

Originality/value

The paper shows how problems in the existing embedding technologies can be overcome. It shows that the preconditions for high reliability at reasonable cost are given.

Citation

Gottwald, T. and Ockenfuß, U. (2007), "How to make chip integration technology suitable for high volume production", Circuit World, Vol. 33 No. 3, pp. 3-8. https://doi.org/10.1108/03056120710776960