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Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology

Sankit Kassa (Department of Electronics and Communication, SNDT Women's University, Mumbai, India)
Prateek Gupta (Department of Computer Science and Engineering, University of Petroleum and Energy Studies, Dehradun, India)
Manoj Kumar (Department of Computer Science and Engineering, University of Petroleum and Energy Studies, Dehradun, India)
Thompson Stephan (Department of Computer Science and Engineering, MS Ramaiah University of Applied Sciences, Bangalore, India)
Ramani Kannan (Department of Electrical and Electronics Engineering, Universiti Teknologi Petronas, Tronoh, Malaysia)

Circuit World

ISSN: 0305-6120

Article publication date: 15 February 2021

Issue publication date: 3 January 2022

236

Abstract

Purpose

In nano-scale-based very large scale integration technology, quantum-dot cellular automata (QCA) is considered as a strong and capable technology to replace the well-known complementary metal oxide semiconductor technology. In QCA technique, rotated majority gate (RMG) design is not explored greatly, and therefore, its advantages compared to original majority gate are unnoticed. This paper aims to provide a thorough observation at RMG gate with its capability to build robust circuits.

Design/methodology/approach

This paper presents a new methodology for structuring reliable 2n-bit full adder (FA) circuit design in QCA utilizing RMG. Mathematical proof is provided for RMG gate structure. A new 1-bit FA circuit design is projected here, which is constructed with RMG gate and clock-zone-based crossover approach in its configuration.

Findings

A new structure of a FA is projected in this paper. The proposed design uses only 50 number of QCA cells in its implementation with a latency of 3 clock zones. The proposed 1-bit FA design conception has been checked for its structure robustness by designing various 2, 4, 8, 16, 32 and 64-bit FA designs. The proposed FA designs save power from 46.87% to 25.55% at maximum energy dissipation of circuit level, 39.05% to 23.36% at average energy dissipation of circuit-level and 42.03% to 37.18% at average switching energy dissipation of circuit level.

Originality/value

This paper fulfills the gape of focused research for RMG with its detailed mathematical modeling analysis.

Keywords

Citation

Kassa, S., Gupta, P., Kumar, M., Stephan, T. and Kannan, R. (2022), "Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology", Circuit World, Vol. 48 No. 1, pp. 48-63. https://doi.org/10.1108/CW-06-2020-0120

Publisher

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Emerald Publishing Limited

Copyright © 2021, Emerald Publishing Limited

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