Institute of Circuit Technology

Citation

Starkey, P. (2002), "Institute of Circuit Technology", Circuit World, Vol. 28 No. 4. https://doi.org/10.1108/cw.2002.21728dab.001

Institute of Circuit Technology

28^th Annual Symposium, London,1 May 2002

Keyword: ICT

The 28^th Annual Symposium of the Institute of Circuit Technology, held at the Infolog Conference Centre in Russell Square on 1^st May 2002, was entitled "Niche Manufacturing" and drew a capacity audience.

ICT Vice-Chairman Chris Wall introduced the event, commenting that with the trend of volume PCB manufacturing to migrate to the Far East, niche manufacture was where the UK industry would find its future, capitalising on the strength of its engineering resources, and its ability to be flexible, innovative and service-orientated.

A remarkably well-balanced symposium programme reflected the spirit of these comments, with input from process innovation, material supply, PCB fabrication, reliability testing and OEM viewpoints.

Richard Heuchan, MD of RT Circuits, explained how technology based on offset litho printing, which had originated from a "Clean Electronics" project at Brunel University, had been characterised and productionised, not by re- invention of the wheel but by skilful application and adaptation of existing principles.

Two variants of the concept had been developed: circuits created directly by litho printing conductive polymer, and additive circuits based on electroless copper metallisation and subsequent electroplating of a litho-printed seed layer.

Richard described the fundamentals of the offset litho process, which is very well-established and very widely used for cost-effective, high- speed, high-definition, tight-registration printing and has finer-line capability than screen printing. Effectively, any offset machine could be adapted for manufacture of printed circuits; the capability of the process related fundamentally to the nature of the inks employed. Although process development and evaluation work had been carried out mainly on a rotary printer, flatbed printing was practicable. Indeed, the scalability of the process had been proven by trials on a newspaper-printing line!

Many applications had been demonstrated, documented and qualified.

Presently, the conductive ink process was being used to produce circuits with 50 micron tracks and gaps, with an 8 micron ink layer, at a rate of 6000 panels per hour. A wide range of base materials, rigid or flexible, could be processed. Even paper could be used as the substrate for very-low-cost applications.

The print and plate process had remarkably fine-line capability, and could handle tracks and gaps down to 20 microns if necessary. In typical applications, tracks and gaps of 40 microns, after plating with 20 microns of copper, were routinely achieved. The natural tendency to line-width growth due to plating was simply compensated at the pre-production tooling stage, and the resultant smoothly rounded edge profile was ideally suited to antenna applications. A small printing line could output 8000 panels per hour, and a current challenge was to find a horizontal plating line capable of matching its throughput.

RT Circuits had fully proven processes for single and double sided conventional circuits and a plated-through process was in development. The feasibility of litho-printed solder mask had been established, presenting the prospect of developing a build-up multilayer process.

PCBs produced by offset litho were already penetrating the market in antennae, RFID tagging, smart cards and mass-transport ticketing, and the cost benefits of the technology were continuing to open-up new areas of opportunity.

Niche manufacturing from the OEM perspective was expertly illustrated by Alec Groves of AMS Cowes. He titled his paper "The Development Tsunami", the tidal-wave analogy referring to the sheer scale and number of the development and product-introduction tasks involved in realising a complex military project, in his example a phased-array multifunctional radar system. In order to avoid being swamped by the Tsunami, it was vital that suppliers and OEM work close together at all levels over a wide range of engineering disciplines, particularly where the OEM is divesting its manufacturing capability.

Alec observed that the strength of the UK electronics industry lay in its engineering infrastructure, both in development and in manufacturing. And military electronics was a definitive example of niche manufacturing, product realisation depending on a combination of invention, development and exploitation of emerging technologies. In relative scale of effort, the "design" function heavily outweighed the "make" function.

He stressed the significance of shared knowledge, using the JOHARI window to show the methodology whereby individuals can, by combining their resources, jointly develop knowledge that neither would have had in isolation. And a quote from George Bernard Shaw about the difference between exchanging apples and exchanging ideas provided further illustration.

The importance of planning was exemplified by quoting from Sir John Harvey-Jones: "... the real benefit of not planning is that failure comes as a complete surprise and is not preceded by months of worry."

A significant component of the radar system in development was a particular microwave filter, which needed to be re-designed into surface- mount format. Alec used this as an example to describe the iterative and interactive sequence of events involving supplier, OEM and assembler which eventually resulted in a functional, robust, value-engineered product.

He went on to expound the strategies which addressed a project whose scale was measured in terms of its 25 year service life, the hundreds of man-years of development, the thousands of printed circuit boards per system, the millions of pounds worth of specialist test equipment required, the millions of solder joints involved and the tens of millions of opportunities for manufacturing defects!

His company, although potentially the "customer from hell", had very carefully selected its collaborators and formed open and honest working relationships which enabled joint, as well as individual, goals to be realised. There was no single winning strategy – it was dependent on the type of product being manufactured, the choice of suppliers involved and the ability of those companies, more importantly their employees, to form inspired relationships.

David Hutt reported a feasibility study being carried out by the Interconnection Group at Loughborough University to investigate surface coatings which would enable fluxless soldering of copper substrates. Collaborating in the study were Shipley, Celestica and Nortel Networks.

Justifying the case for considering fluxless soldering were issues such as control of flux activity, solvent emissions, flux removal processes and potential effects of flux residues on product reliability.

Fluxless soldering had previously been demonstrated using reducing gas, vacuum and plasma environments, but practical implementation of such techniques was difficult.

The objective of this study was to identify a low-cost chemical surface treatment to facilitate fluxless soldering. The process was required to coat the copper surface with an organic layer which would protect it from oxygen in storage, but be displaced by heat and molten solder, unlike conventional OSPs which rely on flux to displace them, during the soldering process.

Encouraging results had been seen with a simple wet-chemical process line, where copper was de-oxidised and treated with an aqueous formulation which formed an organic coating.

Quantitative solderability testing had been carried out after various storage conditions, using tin-lead and tin-silver-copper solders, on a wetting balance equipped with a nitrogen hood to provide a near-inert, low-oxygen atmosphere. David showed a series of wetting balance traces comparing treated and untreated samples. These indicated that treated samples performed significantly better than their untreated counterparts, but that good solderability was only maintained for about two days at room temperature. Storage temperature had a marked effect, and samples kept in a freezer were still solderable after 13 weeks.

X-ray photoelectron spectroscopy had been used to determine the extent of oxide formation during storage, and a clear correlation had been observed between the oxygen peak and the deterioration of solderability.

Work was continuing. Wave soldering in nitrogen with tin-copper solder and various component metallisations had given encouraging results, flip-chip trials with tin-lead bumped dice had shown good wetting and there appeared good potential for optoelectronic device attachment.

There followed two papers from PCB manufacturers, both well-known "niche" manufacturers in the UK:

David Douglas explained the strategy of Lyncolec in offering specialist services over a wide range of technologies, especially those involving flexible substrates, as a means of establishing a close engineering relationship with a customer, securing continuity of business and opening the door to further opportunity.

He focused on Lyncolec's particular strength in the applications of what they termed "flexible hybrids" to interconnection problems and illustrated the case where an interconnect conventionally involving five components: two rigid boards, two ZIF connectors and a flexible jumper, could be re-engineered into a more reliable, more compact and more cost-effective single flexible hybrid.

The essence of the technology was to prepare a composite blank panel by bonding single-sided flexible material and thin single-sided rigid material to opposite sides of a pre-machined rigid core, with spacers inserted to support non- bonded areas which would later become flexible bridges. This composite could then be processed as a rigid plated-through-hole board through the complete manufacturing process, including electrical test and final inspection.

Where appropriate, the circuit could be delivered to the customer still in rigid panel form, to facilitate handling and assembly, only assuming its 3-dimensional flex-rigid character once removed from its supporting panel.

David emphasised the importance of service in supporting niche markets. The circuit manufacturer needed to have a "can-do" attitude and culture in a quick-turnaround environment, with the resources both to provide technical support and to educate customers in understanding what could be achieved by intelligent applications engineering.

Paul Comer referred back to a presentation he had made at the Annual Symposium four years previously, when high-density-interconnection techniques were at a relatively early stage of development and Graphic had committed to being one of the first in the field. Although that generation of technology was now mature, and Graphic were realising a commercial benefit, Paul bore the responsibility as Technical Director for predicting market requirements so that Graphic could make appropriate investments in equipment and process development in order to continue to be ready to take up the opportunities as they materialised.

Paul listed a series of definitions of "niche", suggesting that in the context of the Symposium, a niche was "a gap in the market for a particular type of product or service". He remarked that "gaps don't just appear – you have to go out and find them!", which led him into the subject of "road-maps".

A roadmap might be expected to clearly indicate the way to reach one's destination. However, in the printed circuit industry there are many different technology roadmaps, all authoritative, but giving different information, and Paul referred to the IPC National Technology Roadmap for Electronic Interconnections, the roadmaps of the large industry-sector drivers and those of individual OEMs. Furthermore, as a consequence of the trend to vertical disintegration of the industry, it was necessary travel further and talk to more and more people in order to gather meaningful information. And at the end of the day, forecasting future requirements was as much gut- feel as analysis of roadmap information.

Two terms used by IPC were Revenue Centre of Gravity (RCG), typically practised by 95 per cent of the industry and State of Art (SoA), typically practised by 5 per cent. Paul considered that Graphic's capability represented a combination of the two. He saw track widths of 100 microns as RCG, with 75 microns as SoA; spaces of 75- 100 microns as RCG, with 50 microns as SoA, and microvia diameters of 100 microns as RCG with 75 microns as SoA.

Paul used examples of current work to demonstrate the influence of component packaging I/O density on board layout, and commented that there appeared to be a particular future trend for multilayer interconnect to be routed on fewer layers.

In his opinion, areas where the supply industry should be directing its development effort were: solder resists, drill bits, microvia dielectrics, metallisation processes, processes for electroplating blind holes and full-build electroless copper. Alternative solderable finishes, particularly those which could be applied selectively, would also be required.

Future developments in high density interconnect technology were critically dependent on suitable materials and registration systems becoming available, and the question arose whether subtractive processes had reached their limit. To monitor the outcome of manufacturing, pattern inspection and electrical test equipment would need to be capable of working reliably with sub- 50 micron features.

As ever, the market would continue to demand: "Lighter, Greener, Cooler, Faster, Better...", and the roadmaps were predicting increased miniaturisation, increased complexity (unless the designers take it away?), the need for more complex manufacturing and testing equipment, and particularly the need for people to have better skills.

Jim Francey of Taconic gave a reassuring presentation which dispelled much of the mythology surrounding the processing of PTFE materials.

The justification for specifying PTFE was its consistency of dielectric constant right through the frequency range, together with the lowest loss tangent of any dielectric – of prime importance in wireless and radio frequency, and in high-speed digital data transmission. The material also had very low moisture absorption and natural flame retardancy.

From Taconic's point of view as a major supplier of PTFE materials, the principal market driver was telecommunications infrastructure rather than the military requirement. They saw major opportunities for the niche manufacture of PTFE circuits and were actively supporting the market, both by working with OEMs to design- in PTFE, and by assisting fabricators in understanding how to successfully process the material.

The industry has traditionally been very cautious about the perceived difficulties in processing PTFE. Jim explained that apart from its natural softness, which necessitated careful handling and the avoidance of mechanical brushing, the only fundamental characteristic of the material affecting chemical processing was its non-wettability. Therefore one additional process step was required in the plating-through-hole sequence to render drilled hole surfaces wettable, and this could be either gas plasma or sodium etch. For fabricators who could not justify investment in plasma equipment, proprietary sodium etching processes were now available which were straightforward, robust and reliable.

From the point of view of machining, optimised tool parameters and compliant backing materials were preferred for the high-PTFE-content materials, whereas high-glass-content variants had characteristics similar to those of FR4.

The thermoplastic nature of PTFE meant that multilayers could be constructed by fusion bonding, although few fabricators had suitable presses capable of working at temperatures in excess of 300 degrees. To overcome this limitation, Taconic had collaborated with Isola and Teradyne to produce a composite bonding material known as TacPreg, which enabled PTFE multilayers to be processed through equipment designed for FR4 with minimal sacrifice of dielectric properties.

Dougal Stewart of PWB Solutions raised the very pertinent issue of reliability testing in niche manufacturing, and described a technique called Interconnection Stress Testing (IST), an accelerated test procedure used to determine the integrity of inner layer junctions and plated hole barrels by making continuous resistance measurements under thermal cycling conditions

Testing was carried out using a specifically designed onboard coupon, similar in size to that used for milspec testing, with patterns of representative holes, pads and tracks connected in series. temperature cycling, from ambient to 150^oC in 3 minutes and back to ambient in 2 minutes, was achieved by resistance heating within the coupon itself. coupons could be preconditioned at 230^oC to simulate assembly and rework.

The technique was repeatable and reproducible and capable of rapidly identifying the weakest link in the circuit.

Dougal presented graphs showing resistance degradation versus number of IST cycles. These illustrated that whereas a good sample maintained a steady resistance over 300-plus cycles, the changes in resistance corresponding to the progressive stages of failure of a defective sample could be clearly identified and it was possible to track fatigue, crack initiation, crack propagation, acceleration and ultimate failure of the interconnect. It was normal to terminate the test after resistance had changed by 10 per cent, at which stage the actual location within the coupon at which failure was taking place could be determined.

Dougal listed the potential benefits of ist to the pcb fabricator, the cem and the oem, and illustrated each with casehistory examples.

The fabricator could use IST to rapidly and quantitatively characterise the effect of a change in material or manufacturing process; the assembler could use IST to monitor supplier quality, or to identify the effects of assembly and re-work; the OEM could use IST to establish product reliability, or as a guide to the effects of implementing design changes.

The overall benefits, particularly in the niche manufacturing environment, included reduced time to market, reduced risk of consequential loss and the ability to produce benchmark data on novel technologies.

The final paper of the day came from Paul Makin, who gave an update on the considerable progress made by Sigtronics with their "Kwikboard" processes since his presentation at the 2001 Annual Symposium.

At that time, the principle had been established whereby conductors were created by micro-engraving and filling with conductive polymer, and through-hole connections by drilling and plugging with the same material. The capability of the basic system was to produce prototype double-sided boards with 150 micron tracks and gaps within a couple of hours.

Paul went on to explain how Sigtronics had risen to the challenge presented by the demand for prototype multilayers. With the cooperation of Isola, a lamination system had been developed which complemented the Kwikboard concept, and the process was now able to produce panels up to 200mm x 300mm, up to 6 layers, with tracks of 150 microns and gaps of 100 microns, on a timescale of about 6 hours. Sigtronics were on target to install 10 systems in the UK by the end of 2002.

Concurrently with their multilayer developments, Sigtronics had perfected techniques for laser- ablation of their conductive polymers, such that they could now offer a very rapid and environmentally acceptable route for production of high-density interconnection patterns by single stage direct ablation of conductive-coated laminate. The method offered significant advantages over alternatives based on copper- clad laminate – much less energy was required and the process was considerably faster, cleaner and more controllable. And although the system, named "Kwikboard Laser" still had batch-size-one flexibility, its potential for high throughput opened up opportunities in volume production.

A technology demonstrator would be made available in June 2002, with the ability to process up to 100 panel-sides per hour 300mm x 400mm with lines and spaces of 50 microns down to 25 microns.

Delegates enjoyed an extremely informative day and thanks are due to Frank Coultard and his colleagues for their expert organisation and management of a very successful event.

Pete StarkeyICT Council